Taiwan's DigiTimes reports that Nvidia's Feynman platform, the generation after next, will move straight to A16, TSMC's upgraded version of its 2nm process, and will also raise the share of SoIC 3D stacking, with custom HBM and CPO expected to be combined on top of that. Accordingly, TSMC's monthly SoIC capacity is said to reach 50,000 wafers a month by the end of 2027. What is also interesting is that AP7 P2, which was planned for SoIC, may be partly allocated to CPO and CoWoS lines. This could mean CPO is being pulled forward earlier than expected. ASE's subsidiary SPIL is also said to be establishing itself as a key vendor winning Nvidia orders. This stems from the fact that even if TSMC expands capacity at full force, it will be difficult to meet all customer demand.

Taiwan's DigiTimes reports that Nvidia's Feynman platform, the generation after next, will move straight to A16, TSMC's upgraded version of its 2nm process, and will also raise the share of SoIC 3D stacking, with custom HBM and CPO expected to be combined on top of that. Accordingly, TSMC's monthly SoIC capacity is said to reach 50,000 wafers a month by the end of 2027. What is also interesting is that AP7 P2, which was planned for SoIC, may be partly allocated to CPO and CoWoS lines. This could mean CPO is being pulled forward earlier than expected. ASE's subsidiary SPIL is also said to be establishing itself as a key vendor winning Nvidia orders. This stems from the fact that even if TSMC expands capacity at full force, it will be difficult to meet all customer demand.

Source:https://x.com/jukan05/status/2088061698473410965